The invention relates to a read amplifier for a bipolar memory module formed of a plurality of memory cells arranged in matrix-fashion. The read amplifier evaluates a difference of higher and lower respective read currents in a first and a second bit line of the memory module.
A read amplifier of this type for utilization in rapid ECL memory modules is known from German Pat. No. 20 46 929, corresponding to British Pat. No. 1,302,313, incorporated herein by reference. For reasons which shall be presented in greater detail, particularly in the case of a change between two memory cells with the same information, there results, in comparison with the signal transit time .tau., a long time t.sub.S with a strongly reduced interference resistance or immunity. Moreover, the time t.sub.S falls in a period in which the address change takes place and therefore multiple switching operations occur in the memory module. Since the known read amplifier possesses no inherent or separate interference suppression, the interferences which are generated pass through to the data output and can prolong the read access time to more than double the value of the access time resulting without interference action.